The central processing unit (CPU) or processor lies at the heart of all modern computing systems. The processor executes instructions of a computer program and thus enables the computer perform useful work. CPUs are prevalent in all forms of digital devices in modern life and not just dedicated computing machines such as personal computers, laptops and PDAs. Modern microprocessors appear in everything from automobiles to cellular telephones to children's toys.
A problem arises in that program code which is executable by one type of processor often cannot be executed in any other type of processor, because each type of processor has its own unique Instruction Set Architecture (ISA). Hence, program code conversion has evolved to automatically convert program code written for one type of processor into code which is executable by another type of processor, or to optimise an old, inefficient piece of code into a newer, faster version for the same type of processor. That is, in both embedded and non-embedded CPUs, there are predominant ISAs for which large bodies of software already exist that could be “accelerated” for performance or “translated” to other processors that present better cost/performance benefits. One also finds dominant CPU architectures that are locked in time to their ISA and cannot evolve in performance or market reach. This problem applies at all levels of the computing industry, from stand-alone pocket-sized computing devices right through to massive networks having tens or hundreds of powerful servers.
As background information in this field of program code conversion, PCT publication WO2000/22521 entitled “Program Code Conversion”, WO2004/095264 entitled “Method and Apparatus for Performing Interpreter Optimizations during Program Code Conversion”, WO2004/097631 entitled “Improved Architecture for Generating Intermediate Representations for Program Code Conversion”, WO2005/006106 entitled “Method and Apparatus for Performing Adjustable Precision Exception Handling”, and WO2006/103395 entitled “Method and Apparatus for Precise Handling of Exceptions During Program Code Conversion”, which are all incorporated herein by reference, disclose methods and apparatus to facilitate program code conversion capabilities as may be employed in the example embodiments discussed herein.
One particular problem area concerns the handling of page protection faults. A page protection fault is a type of exception that is raised when a program tries to manipulate a memory location in a way that violates set permissions governing the types of manipulation allowed for that memory location. Typically permissions protecting memory locations are set per page of memory and hence faults generated in this way are referred to as page protection faults.
Where the original program code (here called “subject code”) has been written according to a particular type of processor, then that subject code requires a particular type of execution environment and expects an appropriate mechanism for the handling of page protection faults. However, under program code conversion, the subject code is instead converted into target code and is executed on a target computing system. There is now a difficulty in providing an appropriate mechanism to correctly handle the page protection fault behaviour of the subject code.
A further problem arises in that the subject code may have been written to make extensive use of a finer granularity of page protection than is supported by the native hardware are available on the target computing platform. For example, processors of the Intel™ x86 family support page protection for pages of sizes as small as 4096 bytes (4 kB). However, IBM™ PowerPC processors are often configured by the operating system to offer page protection for pages only as small as 64 kB.
These and other problems of the prior art are addressed by the exemplary embodiments of the present invention as will be discussed in more detail below.